Layout Engineer

December 12, 2023
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Job Description

Role Description

This is a full-time on-site role as a Layout Engineer located in Santa Clara, CA. The Layout Engineer will be responsible for designing circuit layouts, particularly analog circuits, and performing physical verification. The role involves day-to-day tasks associated with creating and testing layouts for integrated circuit designs.


  • Strong knowledge of Layout Design and Circuit Design techniques, with a focus on Analog Circuits
  • Experience in physical verification techniques
  • Proficient in relevant software tools, such as Cadence Virtuoso and IC Station
  • Excellent problem-solving and analytical skills
  • Bachelor’s or Master’s degree in Electrical Engineering or related field
  • Experience with scripting languages, such as Perl or Python is beneficial